High quality FPGA IP products
and design service for boosting your Business!

Browse FPGA IPs

About Us

We are a group of highly-expert people passionate about the embedded world in general and the FPGA technology in particular. We have many years of experience concerning Digital Signal Processing, FPGA IP development, FPGA firmware design, bare-metal and Linux driver development. We are familiar with high-speed IO, from Ethernet to PCie and DDR4. We have been dealing with latest high-speed devices such as ADC and DAC. JESD204 is our friend. We can talk with Wired/Wireless MODEMs using their physical layer language.

We build high-performance FPGA IP blocks which are ready to be integrated into users' system. We are happy to be a part of our clients' more complex systems.

Below are the jobs that you can delegate to us.

  • DESIGN - Communication link, data record & playback system, data logger, digital down/up converter, radar signal processing, etc. We can build your system either from scratch or from your existing one.
  • CONCEPTION - Global architecture, components selection, electrical schematic realisation. We materialize your system.
  • SIMULATION - System simulation. Proof-Of-Concept validation. We validate your system based on simulation on C, C++, Matlab/Simulink.
  • IMPLEMENTATION - FPGA, DSP, Microcontroller firmware, Board Support Package, User API and User Graphical Interface development. We bring life to your system.
  • AND MORE - We have plug-and-play Remote Control, Error Correction Codes, Data Transport and Data Recording solutions ready to be integrated into your system.

FPGA IP Products

We have a selection of FPGA IPs including TCP/IP offload engines and LDPC codec. Our plug-and-play IP cores will drastically shorten your time to market.

1G FPGA TCP/UDP/IP Stack

  • TCP throughput   : 958 Mbps
  • TCP latency           : 104 ns (Tx), 336 ns (Rx)
  • UDP throughput  : 968 Mbps
  • UDP latency          : 168 ns (Tx), 432 ns (Rx)
  • AXI4 wrapper for seamless integration
  • RTL Example design - near line-rate throughput demonstration
  • Microblaze/Zynq BSP - socket-like C API to send your packets from the Microblaze/Zynq. Perfect for remote-control applications
  • Click here for more details

10G FPGA TCP/UDP/IP Stack

  • TCP throughput   : 9.85 Gbps
  • TCP latency           : 76.8 ns (Tx), 166.4 ns (Rx)
  • UDP throughput  : 9.88 Gbps
  • UDP latency          : 140.8 ns (Tx), 115.2 ns (Rx)
  • AXI4 wrapper for seamless integration
  • RTL Example design - near line-rate throughput demonstration
  • Microblaze/Zynq BSP - socket-like C API to send your packets from the Microblaze/Zynq. Perfect for remote-control applications
  • Click here for more details

5G-NR LDPC Codec

  • 5G-NR High Rate (8448, 9216) LDPC encoder and decoder
  • Universal LDPC frame work. The code is easily adapted to support any base graph, any code rate and any lift size value
  • Highly portable VHDL source code
  • Bit-accurate C++ simulation model
  • Layered decoding for optimum performance
  • 15.0 Gbps encoding speed at 280 MHz clock
  • 2.69 Gbps decoding speed at 280 MHz clock, 6 iterations
  • Frame Error Rate below 10^-6 at Eb/N0 = 4.9 dB, 10 iterations
  • On-the-fly Early Stopping technique for reducing power consumption
  • AXI4 wrapper for seamless integration
  • Click here for more details